T4240QDS-PB
Flexible Development System, T4240, Power Architecture, e6500, QorIQ T4, Communication Processor

| Manufacturer | NXP |
|---|---|
| Manufacturer Part No | T4240QDS-PBCopy |
| Manufacturer Standard Lead Time | 51 weeks |
| Order Code | 4757278 |
| Your Part Number | |
| Technical Datasheet |
Need more?
| Quantity | Price |
|---|---|
| 1+ | Php337,462.700 |
Product Information
| Manufacturer | NXP |
|---|---|
| Manufacturer Part No | T4240QDS-PBCopy |
| Manufacturer Standard Lead Time | 51 weeks |
| Order Code | 4757278 |
| Technical Datasheet | |
| Silicon Manufacturer | NXP |
| Silicon Core Number | T4240 |
| Kit Application Type | Communication & Networking |
| Application Sub Type | Communication Processor |
| Core Architecture | Power Architecture |
| Core Sub-Architecture | e6500 |
| Silicon Family Name | QorIQ T4 |
| Kit Contents | Flexible Development System T4240 |
| Product Range | - |
| SVHC | No SVHC (25-Jun-2025) |
Product Overview
T4240QDS-PB is a QorIQ T4240 development system. The NXP® T4240QDS is a flexible development system that supports the 24 virtual core QorIQ® T4240 processors. With its 1.8GHz suite of cores and rich input/output (I/O) mix, the board is intended for development of T4240 in enterprise and datacentre networking, telecom and industrial applications, where the high-performance, high-efficiency e6500 cores and integration make it ideal as a combined control and data plane processor. The board is built to allow the exercising of many capabilities of the device and can serve as a reference for system-level hardware development by providing a comparison tool for customer-specific board implementations.
- 12 dual-threaded e6500 cores built on Power Architecture® technology
- Up to 1.8GHz each, 6.0 DMIPS/MHz per core
- Each four-core cluster shares a 2MB L2 cache
- Three levels of instructions: user, supervisor, hypervisor
- Hybrid 32-bit mode to support legacy software and transition to a 64-bit architecture
- CoreNet® platform L3 cache
- Two high-speed USB 2.0 controllers with integrated PHYs
- Enhanced secure digital host controller(SD/MMC/eMMC) and enhanced serial peripheral interface (eSPI)
- 4 I²C controllers, 2 DUARTS, integrated flash controller supporting NAND and NOR flash memory
- Three 64bit DDR3/3L SDRAM memory controller with ECC support, up to 2.13GT/s, memory prefetch engine
Technical Specifications
| Silicon Manufacturer | NXP |
|---|---|
| Kit Application Type | Communication & Networking |
| Core Architecture | Power Architecture |
| Silicon Family Name | QorIQ T4 |
| Product Range | - |
| Silicon Core Number | T4240 |
|---|---|
| Application Sub Type | Communication Processor |
| Core Sub-Architecture | e6500 |
| Kit Contents | Flexible Development System T4240 |
| SVHC | No SVHC (25-Jun-2025) |
Technical Docs (1)
Legislation and Environmental
| Country of Origin: Country in which last significant manufacturing process was carried outCountry of Origin: | Malaysia Country in which last significant manufacturing process was carried out |
|---|---|
| Tariff No: | 84733080 |
| US ECCN: | 5A002.a.1 |
| EU ECCN: | 5A002.a.1 |
| RoHS Compliant: | To be advised |
| RoHS Phthalates Compliant: | To be advised |
| SVHC: | No SVHC (25-Jun-2025) |
| Download Product Compliance Certificate | Product Compliance Certificate |
| Weight (kg): | .000001 |
