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| Quantity | Price |
|---|---|
| 1+ | Php335.300 |
| 10+ | Php311.000 |
| 25+ | Php300.600 |
| 50+ | Php290.700 |
| 100+ | Php284.900 |
| 250+ | Php278.100 |
| 500+ | Php274.500 |
Product Information
Product Overview
CY7C1041GN-10ZSXIT is a CY7C1041GN high-performance CMOS fast static RAM organized as 256K words by 16-bits. Data writes are performed by asserting the chip enable active-low (CE) and write enable active-low (WE) inputs LOW, while providing the data on I/O0 through I/O15 and address on A0 through A17 pins. The byte high enable active-low (BHE) and byte low enable active-low (BLE) inputs control write operations to the upper and lower bytes of the specified memory location. Active-low BHE controls I/O8 through I/O15 and active-low BLE controls I/O0 through I/O7. Data reads are performed by asserting the chip enable active-low (CE) and output enable active-low (OE) inputs LOW and providing the required address on the address lines. Read data is accessible on the I/O lines (I/O0 through I/O15). Byte accesses can be performed by asserting the required byte enable signal active-low (BHE or BLE) to read either the upper byte or the lower byte of data from the specified address location.
- High speed, tAA = 10ns
- Low active and standby currents, active current: ICC = 38mA typical
- 1.0-V data retention, TTL-compatible inputs and outputs
- 4.5V–5.5V voltage range
- 44-pin TSOP II package
- 4Mbit density, × 16-bits data width
- 65nm process technology
- Industrial operating temperature range from –40°C to +85°C
Technical Specifications
4Mbit
256Kword x 16bit
4.5V to 5.5V
TSOP-II
44Pins
10ns
5V
Surface Mount
85°C
-
Asynchronous SRAM
4Mbit
256Kword x 16bit
TSOP-II
4.5V
5.5V
-
-40°C
-
No SVHC (25-Jun-2025)
Technical Docs (1)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Philippines
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate
